Method of fabricating aLDD field-effect transistor
Patent 4826782 Issued on May 2, 1989. Estimated Expiration Date: 
April 17, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
April 17, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesFabrication of FETs Self-aligned metal process for field effect transistor integrated circuits using polycrystalline silicon gate electrodes Method of fabricating bipolar transistors and insulated gate field effect transistors having doped polycrystalline silicon conductors Patent #: 4735916 InventorsAssigneeApplicationNo. 07/040447 filed on 04/17/1987US Classes:438/305, Plural doping steps257/382, With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide)257/408, Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, LDD device)257/E21.151, Applied layer being silicon or silicide or SIPOS, e.g., polysilicon, porous silicon (EPO)257/E21.166, Conductive layer comprising semiconducting material (EPO)257/E29.146, On silicon (EPO)257/E29.255, With field effect produced by insulated gate (EPO)438/307, Using same conductivity-type dopant438/586Combined with formation of ohmic contact to semiconductor regionExaminersPrimary: Hearn, Brian E.Assistant: Wilczewski, Mary Attorney, Agent or FirmInternational ClassesH01L 21/336 (20060101)H01L 21/285 (20060101) H01L 29/66 (20060101) H01L 29/78 (20060101) H01L 21/02 (20060101) H01L 29/45 (20060101) H01L 29/40 (20060101) H01L 21/225 (20060101) AbstractAn intermediate structure in the fabrication of a metal-oxide semiconductor field-effect transistor is made from a substrate of p+ silicon having an elongate insulated gate structure on its main face. First and second areas of the main face are exposed along first and second opposite sides respectively of the gate structure. Donor impurity atoms are introduced into the substrate by way of at least the first area of the main face, to achieve a predetermined concentration of electrons in a region of the substrate that is subjacent the first area of the main face. The gate structure is opague to the impurity atoms. A sidewall of silicon dioxide is formed along the first side of the gate structure, whereby a strip of the first area of the main face is covered by the sidewall and other parts of the first area remain exposed adjacent the sidewall. Donor impurity atoms to which the gate structure and the sidewall are opaque are introduced into the substrate by way of the portion of the first area that is exposed adjacent the sidewall. A layer of polysilicon is disposite over the portion of the first area of the main face that is exposed adjacent the sidewall. This layer extends up the sidewall and over the gate structure. A layer of a polymer material is formed over the layer of polysilicon to a substantially uniform height over the main face. The height of the free surface of the layer of polymer material is at least as great as the maximum height of the layer of polysilicon over the gate structure. The polysilicon at a height that is at least as great as that of the gate structure is then removed.Other References
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