U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Low jitter phase-locked loop

Patent 4818950 Issued on April 4, 1989. Estimated Expiration Date: Icon_subject April 24, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3781695

Phase locked oscillator
Patent #: 4017806
Issued on: 04/12/1977
Inventor: Rogers

Automatic frequency-tracking circuit
Patent #: 4107624
Issued on: 08/15/1978
Inventor: Turner

Combination phase detector voltage doubler and low-pass filter for use on a phase-lock loop
Patent #: 4122404
Issued on: 10/24/1978
Inventor: Fuhrman

Programmable divider
Patent #: 4162450
Issued on: 07/24/1979
Inventor: Buhrer

Restricted rate of change phase lock loop apparatus
Patent #: 4166984
Issued on: 09/04/1979
Inventor: Jenkins

Digital timing recovery system
Patent #: 4280099
Issued on: 07/21/1981
Inventor: Rattlingourd

Apparatus for deriving clock pulses from return-to-zero data pulses
Patent #: 4321483
Issued on: 03/23/1982
Inventor: Dugan

Phase locked loop having rapid tuning
Patent #: 4379270
Issued on: 04/05/1983
Inventor: Carter ,   et al.

Phase-controlled high frequency oscillator
Patent #: 4387348
Issued on: 06/07/1983
Inventor: Fritze

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Inventor

Assignee

Application

No. 07/041907 filed on 04/24/1987

US Classes:

327/157, With charge pump327/159, With digital element331/17Particular error voltage control (e.g., intergrating network)

Examiners

Primary: LaRoche, Eugene R.
Assistant: Ham, Seungsook

Attorney, Agent or Firm

International Classes

H03L 7/089 (20060101)
H03L 7/08 (20060101)

Abstract

In the preferred embodiment of the invention the jitter in the output signal of a phase-lock loop is minimized by driving a voltage controlled oscillator (VCO) with the average voltage level that appears across a capacitor. The voltage level is maintained by selectively pumping a charge into the capacitor as a function of the deviation of the output signal, from the VCO, from a desired output in a first direction. The charge on the capacitor is allowed to partially bleed off to ground through a variable resistance such that the charge on the capacitor is maintained at levels that cause a slight phase lag in the operation of the voltage controlled oscillator. The phase-locked loop more specifically utilizes an error detector for receiving an incoming digital signal to which the phase-locked loop is to lock and a reference signal corresponding to a divided output signal from the phase-locked loop. The error detector provides signals indicative of the magnitude and the direction of the difference between the incoming digital signal and the reference signal. The difference signals are coupled to a pulse driver circuit for providing pulse charges as a function of the difference signals. A low pass filter having a capacitor receives the pulse charges for charging the capacitor. The low pass filter also incldues means for controllably discharging the capacitor. A voltage controlled oscillator provides an output signal having a phase that is a function of the magnitude of the charge on the capacitor. A divider circuit divides the output signal by selected integers to provide to the error detector the reference signal.

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