U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Logic interchange system

Patent 4808994 Issued on February 28, 1989. Estimated Expiration Date: Icon_subject August 27, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3651454

Distributed control system
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Issued on: 11/06/1979
Inventor: Feiker

Monitor and control apparatus
Patent #: 4298860
Issued on: 11/03/1981
Inventor: Norberg ,   et al.

4374348

Single conductor multi-frequency electric wiring system for vehicles
Patent #: 4463341
Issued on: 07/31/1984
Inventor: Iwasaki

System for load output level control
Patent #: 4484190
Issued on: 11/20/1984
Inventor: Bedard

Apparatus for controlling electrical receivers occupying at least two states
Patent #: 4499463
Issued on: 02/12/1985
Inventor: Jacquel

Transmission control system
Patent #: 4516121
Issued on: 05/07/1985
Inventor: Moriyama ,   et al.

System for power supply to and switching of a number of electrical appliances
Patent #: 4524288
Issued on: 06/18/1985
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Control circuit for automotive accessory system
Patent #: 4578591
Issued on: 03/25/1986
Inventor: Floyd ,   et al.

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Inventor

Application

No. 07/089838 filed on 08/27/1987

US Classes:

340/825.57, Pulse responsive actuation340/825.52, Addressing340/825.65, Counting340/825.67Counting chain

Examiners

Primary: Weldon, Ulysses

Attorney, Agent or Firm

International Classes

G05B 19/04 (20060101)
G05B 19/042 (20060101)
G08C 15/12 (20060101)
G08C 15/00 (20060101)
G05B 19/07 (20060101)
H04L 7/00 (20060101)

Abstract

A system for remotely controlling electrical devices includes a plurality of identical modules which can be made as multiple copies of an integrated circuit chip. Each chip includes logic for recognizing a code, the logic being programmable by EEPROMs so that each chip can be set to recognize a unique address code. The modules can be connected to input or output devices, or both. All modules are interconnected by no more than four wires. A clock pulse source is connected to the system, the source being periodically interrupted to synchronize the system when the clock pulses restart.

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