Abstract

The invention relates to an active symmetrical balance hybrid circuit. The hybrid circuit includes an input, an output and an in/output as well an impedance circuit per half section connected to the input and output which is connected between the in/output and one or more virtual ground points. Between a virtual ground point and one of the supply lines a signal transistor is inserted. The hybrid circuit further includes per half section two auxiliary transistors connected between the supply lines and the in/output. The auxiliary transistors multiply by the same factor the current flowing through a signal transistor together with which the auxiliary transistor is incorporated in a current mirror circuit. A signal transistor can be incorporated in a current mirror circuit with one or two auxiliary transistors in the same half section, but also by means of a universal coupling of the two half sections both with an auxiliary transistor in the one and an auxiliary transistor in the other half section. The overall impedance of the impedance circuit is related to the coefficient of the auxiliary transistors to such an extent that the hybrid circuit fulfills the line matching condition. The partial impedances divided between the in/output, output and input are selected such that the balance condition of the hybrid circuit is fulfilled. The use of complementary signal and auxiliary transistors is preferred in the hybrid circuit. The hybrid circuit has a minimum dissipation and requires very little supply voltage, especially when complementary transistors are used.