Input/output control technique utilizing multilevel memory structure for processor and I/O communication
Patent 4783730 Issued on November 8, 1988. Estimated Expiration Date: 
September 19, 2006. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
September 19, 2006. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesModule for coupling computer-processors Apparatus for managing the data transfers between a memory unit and the different processing units of a digital data processing system Communication multiplexer using a random access memory for storing an acknowledge response to an input/output command from a central processor System for regulating data transfer operations Patent #: 4644463 InventorAssigneeApplicationNo. 06/910006 filed on 09/19/1986US Classes:710/5Input/Output command processExaminersPrimary: Chan, Eddie P.Attorney, Agent or FirmInternational ClassesG06F 15/16 (20060101)G06F 15/167 (20060101) AbstractA multilevel communication structure controls input/output (I/O) data transfers and control functions in a computer system. Communication is achieved through shared memory structures in main memory commonly connected to each processor and each I/O adapter in the system. The levels of the communication structure are for communicating information between adapters or processors and processors, for communicating information relative to I/O control functions of an I/O device, and for specifying I/O functional operations. The information contained in the memory structures may be directly interpreted by sequencers of the I/O adapters, to achieve the I/O data transfers. | |
