U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Method for avoiding shorts in the manufacture of layered electrical components

Patent 4774193 Issued on September 27, 1988. Estimated Expiration Date: Icon_subject March 4, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Semiconductor defects curing method and apparatus Patent #: 4725558
Issued on: 02/16/1988
Inventor: Yamazaki ,   et al.

Inventor

Assignee

Application

No. 07/021812 filed on 03/04/1987

US Classes:

438/96, Amorphous semiconductor136/258, Polycrystalline or amorphous semiconductor136/290, TESTING, CALIBRATING, TREATING (E.G., AGING, ETC.)257/E31.042, Including only Group IV element (EPO)430/313, With formation of resist image, and etching of substrate or material deposition438/98Contact formation (i.e., metallization)

Examiners

Primary: Weisstuch, Aaron

Attorney, Agent or Firm

International Classes

H01L 31/18 (20060101)
H01L 31/20 (20060101)
H01L 31/0392 (20060101)
H01L 31/036 (20060101)

Foreign Application Priority Data

1986-03-11 DE

Abstract

A method for avoiding shorts between two separated layer electrodes in a layered electrical component, such as a solar cell having amorphous silicon layers, includes the steps of generating a first electrode layer on a substrate, generating an intermediate non-electrode layer, which may possibly have voids therein, over the first electrode, and generating a photo-resist layer on the intermediate layer which fills any voids which may exist in the intermediate layer. The substrate and the first electrode layer are transmissive for selected radiation, and the intermediate layer is non-transmissive for the selected radiation. The photo-resist is exposed in the voids by irradiation with the selected radiation through the substrate and the first electrode layer, so that the exposed photo-resist in the voids has a different solubility than the unexposed remainder of the photo-resist. If the photo-resist is of the type such that irradiation polymerizes the exposed photo-resist, a polymerized plug will be present in any voids which may exist in the intermediate layer, so that when a second electrode layer is subsequently applied over the intermediate layer, no shorts will result through the voids. If the photo-resist is of the opposite type, the soluble photo-resist is removed from the voids, leaving a mask of polymerized photo-resist over the intermediate layer, and the voids are filled using the mask with an insulating material. The photo-resist mask is then removed and the second electrode layer is generated over the intermediate layer, with the insulating plugs again preventing the formation of shorts through the voids.

Other References

  • "Amorphous and Polycrystalline Semiconductors", Hewang, vol. 18 in the series Semiconductor Electronics (1984), pp. 58-64
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