Undirectional looped bus microcomputer architecture Patent #: 4378589
ApplicationNo. 06/770541 filed on 08/29/1985
US Classes:710/47, Polled interrupt710/269Handling vector
ExaminersPrimary: Zache, Raulfe B.
Attorney, Agent or Firm
International ClassesG06F 13/20 (20060101)
G06F 13/24 (20060101)
G06F 9/48 (20060101)
G06F 9/46 (20060101)
AbstractA system is disclosed for managing a plurality of interrupt handlers in a linked-list data structure, for servicing a plurality of input/output devices sharing a common interrupt line in a microcomputer. The system provides for an orderly method to link a newly loaded interrupt handler routine into a linked-list data structure consisting of previously loaded interrupt handler routines. The system further provides for an orderly method to share a common interrupt line among a plurality of input/output devices being serviced by the interrupt handlers. The system further provides for an orderly means to unlink a particular interrupt handler routine from the linked-list data structure when a corresponding input/output device is to be deactivated. The system finds special utility in a multitasking operating system environment where input/output devices can be deactivated in a different sequence from that in which they were originally activated.