Packaging system for multiple semiconductor devices
Patent 4763188 Issued on August 9, 1988. Estimated Expiration Date: 
November 4, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
November 4, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3564114 High performance semiconductor package assembly Patent #: 4322778 InventorApplicationNo. 07/117917 filed on 11/04/1987US Classes:257/777, Chip mounted on chip174/529, On lead frame174/536, Lead frame174/544, Shock absorption257/668, On insulating carrier other than a printed circuit board257/793, Including epoxide257/E23.036, Additional leads being wiring board (EPO)257/E23.124, Device being completely enclosed (EPO)257/E23.127, Sealing arrangements between parts, e.g., adhesion promoters (EPO)257/E23.172, Assembly of plurality of insulating substrates (EPO)257/E25.011, Devices being arranged next and on each other, i.e., mixed assemblies (EPO)361/796With housing or chassisExaminersPrimary: James, Andrew J.Assistant: Prenty, Mark V. Attorney, Agent or FirmInternational ClassesH01L 25/065 (20060101)H01L 23/538 (20060101) H01L 23/48 (20060101) H01L 23/31 (20060101) H01L 23/52 (20060101) H01L 23/495 (20060101) H01L 23/28 (20060101) AbstractAn improved high density packaging system for interconnecting integrated circuit devices includes a tin alloy lead frame sandwiched between two multi-layer glass/epoxy substrates encapsulated in an injection molded plastic/epoxy package. Integrated circuit devices are mounted on the top of the upper substrate and on the bottom of the lower substrate to provide increased packaging density. | |
