Method of making an article comprising a buried SiO2 layer
November 26, 2006. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesRegrowing selectively formed ion amorphosized regions by thermal gradient Method of making integrated circuits utilizing ion implantation and selective epitaxial growth MOS Semiconductor device and method of manufacturing the same Method of eliminating p-type electrical activity and increasing channel mobility of Si-implanted and recrystallized SOS films Fabrication of dielectrically isolated devices utilizing buried oxygen implant and subsequent heat treatment at temperatures above 1300° C . Patent #: 4676841 InventorsApplicationNo. 06/935273 filed on 11/26/1986US Classes:438/766, Implantation of ion (e.g., to form ion amorphousized region prior to selective oxidation, reacting with substrate to form insulative region, etc.)257/347, Single crystal semiconductor layer on insulating substrate (SOI)257/E21.339, Of electrically inactive species in silicon to make buried insulating layer (EPO)257/E21.564, SOI together with lateral isolation, e.g., using local oxidation of silicon, or dielectric or polycrystalline material refilled trench or air gap isolation regions, e.g., completely isolated semiconductor islands (EPO)438/407, Nondopant implantation438/423Implanting to form insulatorExaminersPrimary: Roy, UpendraAttorney, Agent or FirmInternational ClassesH01L 21/265 (20060101)H01L 21/70 (20060101) H01L 21/02 (20060101) H01L 21/762 (20060101) AbstractWe have discovered that high quality subcritical SIMOX silicon-on-insulator wafers can be produced by a method that comprises a randomizing implant followed by an appropriate heat treatment. In a preferred embodiment, the inventive method comprises, in succession, a subcritical oxygen implant (nominal wafer temperature 1200° C.) anneal, a randomizing implant (~5×1014 Si/cm2, nominal wafer temperature <100° C.), and a low temperature anneal (nominal wafer temperature between 500° and 700° C.). The resulting buried SiO2 layer typically is relatively thin (e.g., 60 nm), stoichiometric, continuous, and essentially free of Si inclusions, and the Si overlayer typically is of device quality and essentially free of twins, with χmin~3%.Other References
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