Removable sidewall spacer for lightly doped drain formation using one mask level and differential oxidation
May 11, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesField effect transistor with decreased substrate control of the channel width Fabrication of submicron semiconductor devices Polysilicon-doped-first CMOS process Process for forming self-aligned complementary source/drain regions for MOS transistors Simple process for making complementary transistors Method for making a self-aligned vertically stacked gate MOS device Method for manufacturing semiconductor device Method of fabricating high speed CMOS devices Method of making CMOS circuits by twin tub process and multiple implantations Method of forming conductive channel extensions to active device regions in CMOS device InventorsAssigneeApplicationNo. 07/047589 filed on 05/11/1987US Classes:438/231, Plural doping steps257/408, Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, LDD device)257/900, MOSFET TYPE GATE SIDEWALL INSULATING SPACER257/E21.038, Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (EPO)257/E21.64, With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (EPO)257/E29.04, Of field-effect transistors with insulated gate (EPO)257/E29.255With field effect produced by insulated gate (EPO)ExaminersPrimary: Hearn, Brian E.Assistant: Bunch, William Attorney, Agent or FirmInternational ClassesH01L 21/70 (20060101)H01L 21/033 (20060101) H01L 21/336 (20060101) H01L 21/02 (20060101) H01L 29/66 (20060101) H01L 29/02 (20060101) H01L 29/78 (20060101) H01L 21/8238 (20060101) H01L 29/08 (20060101) AbstractA method of using removable sidewall spacers to minimize the need for mask levels in forming lightly doped drains (LDDs) in the formation of CMOS integrated circuits. Aluminum or chemical vapor deposition (CVD) metals such as tungsten are suitable materials to form removable sidewall spacers which exist around CMOS gates during heavily doped source/drain region implants. Other materials such as CVD polysilicon may also be useful for the sidewall spacers. The sidewall spacers are removed before implantation of the lightly doped drain regions around the gates. This implanation sequence is exactly the reverse of what is currently practiced for lightly doped drain formation. The invention also includes the use of a differential oxide layer. A second set of disposable sidewall spacers or the use of permanent sidewall spacers form optional embodiments.Other References
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