Multiple path multiplexed host to network data communication system
May 13, 2005. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3643236 Secondary storage facility for data processing Mini-programmable controller Data interface mechanism for interfacing bit-parallel data buses of different bit width Data processing system having unique bus control operation Dual port exchange memory between multiple microprocessors Dual port cache with interleaved read accesses during alternate half-cycles and simultaneous writing Tack-on acknowledgement in computer networks Bridge circuit for interconnecting networks Communication controller using multiported random access memory InventorAssigneeApplicationNo. 06/733173 filed on 05/13/1985US Classes:370/364, Having plural buses710/316Path selecting switchExaminersPrimary: Williams, Archie E. Jr.Assistant: Coleman, Eric Attorney, Agent or FirmInternational ClassesG06F 13/12 (20060101)G06F 13/40 (20060101) H04L 12/56 (20060101) AbstractA data transfer controller allows data to be transferred from a network bus to a system bus in a host computer. The controller has a network bus interface for communicating with the network bus and a system bus interface for communicating with the system bus. The system bus interface has first and second buffers. A dual port memory is utilized and has one port operatively connected to one of the buffers in the system bus interface and to a microprocessor. The direct access channel is established and operatively connected to the other buffer of the system bus interface as well as coupled to the microprocessor and associated control logic. A switch under control of the control logic establishes connections between the second port of the dual port memory and either the direct access channel or the network bus interface.Other References
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