Patent ReferencesPlural memory controller apparatus Patent #: 4016545 InventorsAssigneeApplicationNo. 06/719778 filed on 04/04/1985US Classes:711/219Incrementing, decrementing, or shifting circuitryExaminersPrimary: Zache, Raulfe B.Attorney, Agent or FirmInternational ClassG06F 12/02 (20060101)AbstractA reference count decimator and method of operating a computer system includes a decimator queue for containing indications of pointer reference count increments. Apparatus is provided for determining if a referencing event would cause a decrement of a reference count, and for searching the decimator queue to determine if a counterpart of the reference event exists in the queue, to thereby define an increment/decrement pair. If an increment/decrement pair is determined to exist in the queue, the increment/decrement pair is cancelled from the queue so that the increment/decrement point reference pairs are removed from the computer system without actually modifying the reference count indications associated with the memory blocks. | |