U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Method of manufacturing a semiconductor device

Patent 4686759 Issued on August 18, 1987. Estimated Expiration Date: Icon_subject September 12, 2004. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3681147

Process for production of integrated MOS circuits with and without MNOS memory transistors in silicon-gate technology
Patent #: 4306353
Issued on: 12/22/1981
Inventor: Jacobs ,   et al.

Method of making double level polysilicon series transistor devices Patent #: 4380863
Issued on: 04/26/1983
Inventor: Rao

Inventors

Application

No. 06/649633 filed on 09/12/1984

US Classes:

438/587, Forming array of gate electrodes257/215, Charge transfer device257/734, COMBINED WITH ELECTRICAL CONTACT OR LEAD257/E21.457, With insulated gate (EPO)257/E29.138, For charge coupled devices (EPO)438/144, Charge transfer device (e.g., CCD, etc.)438/622Multiple metal levels, separated by insulating layer (i.e., multiple level metallization)

Examiners

Primary: Hearn, Brian E.
Assistant: McAndrews, Kevin

Attorney, Agent or Firm

International Classes

H01L 21/02 (20060101)
H01L 29/40 (20060101)
H01L 21/339 (20060101)
H01L 29/423 (20060101)

Foreign Application Priority Data

1983-09-23 NL

Abstract

Method of manufacturing a semiconductor device and semiconductor device manufactured by the use of such a method.A method of contacting narrow regions, such as narrow polysilicon gates of a CCD, having widths of, for example, 4 μm. Upper layers, which are required for the CCD electrodes, are used as etching masks for contacts to the lower electrode layers. Two upper layers define two contact openings of 4 μm which are displaced both with respect to each other and with respect to the region to be contacted. Therefore it is possible to define a contact opening which is smaller than 4 μm and which is aligned accurately above the gate to be contacted.

Other References

  • Beck, G. A., et al. "High Density Frame Transfer Image Sensor" Proc. of the 14th Conf. (1982 Int'l.) on Solid State Devices, Tokyo, 1982
  • Jap. J. App. Phys., vol. 22 (1983) Supp. 22-1, pp. 109-112
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