Patent References 2876418 3500381 Sequential successive approximation analog-to-digital converter Fast charge transfer analog-to-digital converter Patent #: 4375059 InventorAssigneeApplicationNo. 06/791746 filed on 10/28/1985US Classes:341/122, SAMPLE AND HOLD341/163RecirculatingExaminersPrimary: Miller, Carl S.Attorney, Agent or FirmInternational ClassH03M 1/00 (20060101)AbstractThere is provided an analog-to-digital conversion technique that utilizes a sample and hold circuit for each bit try stage whereby after the most significant bit try, the remainder is sampled and held by the succeeding stage as an unknown input voltage for comparison with its respective reference voltage representing its corresponding bit weight. Thus, remainders for each bit weight comparison are successively passed from the most significant bit to the least significant bit as input voltages to the next bit try stage. The previous bit stage takes a new sample input voltage and starts another conversion at the next clock pulse. After the first full digital output of the initial conversion, a new digital output word of the successive sampled signal voltage is available after each clock pulse.Other References
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