U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers

Patent 4639890 Issued on January 27, 1987. Estimated Expiration Date: Icon_subject January 27, 2004. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3577086

3930239

Semiconductor integrated circuit memory device with both serial and random access arrays
Patent #: 4498155
Issued on: 02/05/1985
Inventor: Mohan Rao

Random access memory having a second input/output port
Patent #: 4541075
Issued on: 09/10/1985
Inventor: Dill ,   et al.

Video display system using serial/parallel access memories Patent #: 4562435
Issued on: 12/31/1985
Inventor: McDonough ,   et al.

Inventors

Assignee

Application

No. 06/567040 filed on 12/30/1983

US Classes:

345/559, Register345/564, Addressing365/189.12, With shift register365/230.09, Combined random and sequential addressing711/100, STORAGE ACCESSING AND CONTROL711/167, Access timing713/601Inhibiting timing generator or component

Examiners

Primary: Heckler, Thomas M.
Assistant: Dorsey, Dennis L.

Attorney, Agent or Firm

International Classes

G09G 5/36 (20060101)
G09G 5/391 (20060101)

Abstract

In a computer system, an improved memory circuit is provided for accomodating video display circuits with CRT screens having different resolutions. The memory circuit includes a bit-mapped RAM unit or chip having sufficient cells to accomodate any CRT screen intended to be used, and it further includes a serial shift register having a plurality of taps at locations corresponding to different preselected columns of cells in the chip. In the system, provision is included for selecting taps to unload only the portion of the shift register containing the bits of interest, whereby unused portions of the chip may be effectively excluded and the time for transferring data of interest to the CRT screen is reduced.

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