Semiconductor integrated circuit memory device with both serial and random access arrays
Random access memory having a second input/output port
Video display system using serial/parallel access memories Patent #: 4562435
ApplicationNo. 06/567040 filed on 12/30/1983
US Classes:345/559, Register345/564, Addressing365/189.12, With shift register365/230.09, Combined random and sequential addressing711/100, STORAGE ACCESSING AND CONTROL711/167, Access timing713/601Inhibiting timing generator or component
ExaminersPrimary: Heckler, Thomas M.
Assistant: Dorsey, Dennis L.
Attorney, Agent or Firm
International ClassesG09G 5/36 (20060101)
G09G 5/391 (20060101)
AbstractIn a computer system, an improved memory circuit is provided for accomodating video display circuits with CRT screens having different resolutions. The memory circuit includes a bit-mapped RAM unit or chip having sufficient cells to accomodate any CRT screen intended to be used, and it further includes a serial shift register having a plurality of taps at locations corresponding to different preselected columns of cells in the chip. In the system, provision is included for selecting taps to unload only the portion of the shift register containing the bits of interest, whereby unused portions of the chip may be effectively excluded and the time for transferring data of interest to the CRT screen is reduced.