Operations controller for a fault-tolerant multiple computer system
Microprogram control circuit
Computer monitoring system for indicating abnormalities in execution of main or interrupt program segments
Fail-safe circuit for a microcomputer based system Patent #: 4488303
ApplicationNo. 06/663242 filed on 10/22/1984
US Classes:714/47, Performance monitoring for fault avoidance714/16, Forward recovery (e.g., redoing committed action)714/55, Timing error (e.g., watchdog timer time-out)714/704Error count or rate
ExaminersPrimary: Atkinson, Charles E.
Attorney, Agent or Firm
International ClassesG06F 11/14 (20060101)
G06F 11/00 (20060101)
AbstractA system for detecting a fault in the program execution of a programmed digital signal processing system is disclosed. The fault detection system may include a plurality of monitoring devices for monitoring the execution of a plurality of program portions of the programmed processor and for generating a fault signal in response to a detected faulty program execution condition. Logic circuitry is included for restarting of suspending any fault signal generation rendered by the plurality of monitoring devices. Further included is circuitry for limiting the number of automatic restarts to a predetermined number which avoids continuous cycling between fault signal generation and reset. Still further, the predetermined number of fault generations must occur within a given time interval which may be set and from time to time changed by the program instructions, for example. A fault indication or alarm is not provided until the predetermined number of fault signal generations has occurred within the predetermined time interval. While in the alarm state, the monitoring devices are inhibited, rendering the fault detection system inoperative, and the program execution of the programmed processor is sustained in an initial state. The fault detection system further includes a power supply monitor which disables the logic circuitry when the power supply of the program processor is below a predetermined level to render the fault detection system inoperative and to sustain the program execution at its initial state.