Patent ReferencesInventorAssigneeApplicationNo. 06/606916 filed on 05/04/1984US Classes:375/272, Frequency shift keying329/303, Including logic element (e.g., logic gate or flip-flop375/334Frequency shift keyingExaminersPrimary: Griffin, Robert L.Assistant: Chin, Stephen Attorney, Agent or FirmInternational ClassH04L 27/10 (20060101)AbstractA system for communicating digital data over a limited bandwidth transmission link, including a transition detector for detecting transitions in the binary logic state of an input digital signal and generating a transition indicator signal in response thereto; a frequency-shift key responsive to the transition indicator signal for generating a frequency-shift keyed signal to be transmitted over the link corresponding to the logic states of the input digital signal, the frequency-shift keyed signal comprised of substantially one cycle of a high-frequency signal for a bit at one logic state and substantially one-half cycle of a low-frequency signal for a bit at the other logic state; a zero-crossing detector for detecting zero-crossings of the frequency-shift keyed signal received over the link and generating a zero-crossing indicator signal; a frequency detector responsive to the zero-crossing signal for detecting the high-frequency and low-frequency signals of the frequency shift-keyed signal, and generating a frequency indicator signal; and a pulse generator responsive to the frequency indicator signal for generating an output digital signal corresponding to the input digital signal. A synchronizer synchronizes shifts between the high-frequency and low-frequency signals of the frequency-shift keyed signal with changes in the logic state of the digital signal. The frequency-shift key includes an oscillator for generating the high-frequency and low-frequency signals, and an oscillator reset for providing substantially in-phase signal shifts between the high-frequency and low-frequency signals of the frequency-shift keyed signal. | |