MOS static ram with capacitively loaded gates to prevent alpha soft errors
Patent 4590508 Issued on May 20, 1986. Estimated Expiration Date: 
November 29, 2003. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
November 29, 2003. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3657614 Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer Radiation hard memory cell and array thereof Field-effect transistor structure in multilevel polycrystalline silicon Electrically alterable floating gate memory with self-aligned low-threshold series enhancement transistor Patent #: 4258378 InventorsAssigneeApplicationNo. 06/555420 filed on 11/29/1983US Classes:257/379, Combined with passive components (e.g., resistors)257/297, With means for preventing charge leakage due to minority carrier generation (e.g., alpha generated soft error protection or "dark current" leakage protection)257/E23.115, Against alpha rays (EPO)257/E27.101, Load element being a resistor (EPO)365/154Flip-flop (electrical)ExaminersPrimary: Larkins, William D.Attorney, Agent or FirmInternational ClassesG11C 11/412 (20060101)G11C 5/00 (20060101) H01L 23/552 (20060101) H01L 23/556 (20060101) H01L 27/11 (20060101) Foreign Application Priority Data1980-01-29 JPAbstractA semiconductor device in which a logic information can be held stably without being influenced by -rays, is disclosed. The major feature of the device resides in that a capacitor is provided at a control terminal of a transistor holding a logic information thereby to increase an effective capacitance of the control terminal.Other References
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