Memory system handling a plurality of bits as a unit to be processed
Patent 4561072 Issued on December 24, 1985. Estimated Expiration Date: 
October 21, 2003. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
October 21, 2003. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3643236 3753242 3772658 InventorsAssigneeApplicationNo. 06/528389 filed on 10/21/1983US Classes:365/189.04, Simultaneous operations (e.g., read/write)365/230.03, Plural blocks or banks365/233, Sync/clocking365/238.5Byte or page addressingExaminersPrimary: Fears, Terrell W.Attorney, Agent or FirmInternational ClassesG06F 12/02 (20060101)G06T 1/60 (20060101) Foreign Application Priority Data1980-04-04 JPAbstractAn addressing system for a memory circuit which reads out plural locations simultaneously and then arranges the readout information into a desired sequence or format. | |
