U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Ladder-type signal attenuator

Patent 4468607 Issued on August 28, 1984. Estimated Expiration Date: Icon_subject May 4, 2002. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3590366

3728719

3858128

3898593

Trim network for monolithic circuits and use in trimming a d/a converter
Patent #: 4150366
Issued on: 04/17/1979
Inventor: Price

Digital-to-analog converter with improved compensation arrangement for offset voltage variations
Patent #: 4349811
Issued on: 09/14/1982
Inventor: Brokaw

Monolithic integrable R-2R network Patent #: 4381499
Issued on: 04/26/1983
Inventor: Struthoff

Inventors

Assignee

Application

No. 06/374886 filed on 05/04/1982

US Classes:

323/354, Selective333/81R, ATTENUATORS341/138, Nonlinear341/144, Digital to analog conversion455/249.1Variable attenuator type

Examiners

Primary: Wong, Peter S.

Attorney, Agent or Firm

International Class

H03H 7/24 (20060101)

Foreign Application Priority Data

1981-05-07 JP

Abstract

A ladder-type signal attenuator comprises a ladder network (50) storing a ladder resistor circuit of a plurality of stages (n-1) each having an input resistor (2R) and an output resistor (R) and a ladder portion of the final stage (n) having an input resistor (8) and an output resistor (7) and coupled to the ladder resistor circuit. The resistance value (RB) of the input resistor (8) of the ladder portion of the final stage is different from 2R and/or the resistance value (RA) of the output resistor (7) is different from R. A bias voltage (Vb) or an analog input signal (Sin) is selectively applied to a corresponding signal input terminal of the ladder circuit (50) by means of switches (S1 to Sn) in response to control data (b1 to bn) of n bits. At least one of the resistance values of the two resistors (7, 8) of the final stage ladder portion is changed as a function of the state "0" or "1" of the final bit (bn ) of the control data, whereby the ratio of the output to the input of the ladder-type signal attenuator with respect to the control data is approximated in a polygonal line manner to a desired curve.

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