U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Program call method and call instruction execution apparatus

Patent 4454580 Issued on June 12, 1984. Estimated Expiration Date: Icon_subject September 16, 2001. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Data processing system featuring subroutine linkage operations using hardware controlled stacks
Patent #: 4041462
Issued on: 08/09/1977
Inventor: Davis ,   et al.

System of controlling procedure execution using process control blocks
Patent #: 4084224
Issued on: 04/11/1978
Inventor: Appell, et al.

System for excuting a program-call instruction in a computer
Patent #: 4128878
Issued on: 12/05/1978
Inventor: Yasuhara ,   et al.

Calling instructions for a data processing system Patent #: 4338663
Issued on: 07/06/1982
Inventor: Strecker ,   et al.

Inventors

Application

No. 06/302932 filed on 09/16/1981

US Classes:

712/242To macro-instruction routine

Examiners

Primary: Zache, Raulfe B.

Attorney, Agent or Firm

International Classes

G06F 9/50 (20060101)
G06F 12/02 (20060101)
G06F 9/46 (20060101)

Abstract

A computer architecture is disclosed which permits intersegment program calls with associated selective allocation of data segments of varying lengths. The calling program controls selective allocation of segments to the called program but the called program controls the lengths of the segments being allocated. In this way, recursive calls to the same program cannot affect the function or data of other programs or of the same program in a previous call. Also allocation of data segments can be postponed until execution resulting in more flexible execution of programs written without knowledge of the details of other co-executing programs.

Other References

  • Steven A. Lapham and Harold M. Kop, "The 8086 μP has the architecture to handle high-level anguages efficiently"; Electronic Design 5; Mar. 1, 1980; pp. 97-99
  • iAPX 86,88 User's Manual; Intel Corporation; Aug. 1981; pp. 1-2, 3; 2-7 through 17; 2-43 through 51; and 2-68, 69
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