Information storage facility with multiple level processors
Multi-processor data processing system
Process for controlling operation of and data exchange between a plurality of individual computers with a control computer
Module for coupling computer-processors Patent #: 4253146
ApplicationNo. 06/208355 filed on 11/19/1980
US Classes:712/21, Multiple instruction, Multiple data (MIMD)718/100TASK MANAGEMENT OR CONTROL
ExaminersPrimary: Smith, Jerry
Assistant: Fleming, Michael R.
Attorney, Agent or Firm
International ClassesG06F 13/37 (20060101)
G06F 15/16 (20060101)
G06F 13/36 (20060101)
G06F 15/167 (20060101)
AbstractThe architecture of a special-purpose multiprocessor, hierarchically structured and functionally distributed, having ditributed cache memory for local processing and a common applictions task manager in each microcomputer. A group of identical microcomputers execute the total program in an intrinsically parallel mode within the frame times scheduled by a system state control microcomputer.