System and method for LSI circuit analysis
Patent 4386403 Issued on May 31, 1983. Estimated Expiration Date: 
May 31, 2000. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
May 31, 2000. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References3653072 InventorsApplicationNo. 06/108911 filed on 12/31/1979US Classes:716/17Programmable integrated circuit (e.g., basic cell, standard cell, macrocell)ExaminersPrimary: Shaw, Gareth D.Assistant: Heckler, Thomas M. Attorney, Agent or FirmInternational ClassG06F 17/50 (20060101)AbstractA system and method for analysis of circuits which include a large number of circuit elements. Blocks of circuitry which define logical circuit functions such as gates and latches are set up as macromodels. Each macromodel need be represented in its full detail only once. Means are provided to recognize latency, or quiescence, of macromodels so that time may be saved in the circuit analysis when a macromodel is latent.Other References
| |
