Patent References 3911168 Semiconductor device with a high breakdown voltage characteristic Semiconductor integrated circuit Semiconductor device Semiconductor device with two passivating layers Method of passivating a semiconductor device utilizing dual polycrystalline layers Patent #: 4194934 InventorsAssigneeApplicationNo. 06/248208 filed on 03/27/1981US Classes:438/763, Layers formed of diverse composition or by diverse coating processes257/644, At least one layer of glass257/E21.266, Inorganic layer (EPO)257/E21.301, Oxidation of silicon-containing layer (EPO)438/764, Formation of semi-insulative polycrystalline silicon438/958PASSIVATION LAYERExaminersPrimary: Smith, John D.Attorney, Agent or FirmInternational ClassesH01L 21/02 (20060101)H01L 21/321 (20060101) H01L 21/314 (20060101) AbstractThere is disclosed a method of forming a multi-layer passivant system including a layer of oxygen doped polycrystalline silicon over the semiconductor substrate. A layer of silicon dioxide is thermally grown over the oxygen doped polycrystalline silicon layer. If desired, layers of glass and an additional oxide layer can be formed over the thermally grown oxide.Other References
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