Patent References 3842405 Auto-selection priority circuits for plural channel adapters Patent #: 4159518 InventorsApplicationNo. 06/107465 filed on 12/26/1979US Classes:710/305Bus interface architectureExaminersPrimary: Zache, Raulfe B.Attorney, Agent or FirmInternational ClassesG06F 11/267 (20060101)G06F 13/20 (20060101) G06F 13/26 (20060101) G06F 13/12 (20060101) G06F 11/273 (20060101) G06F 13/38 (20060101) Foreign Application Priority Data1979-01-02 SEAbstractCommunication control functions are performed by an integrated adapter implemented as microcode resident in host CPU storage. The integrated adapter shares a common high speed bus with other CPU facilities. A high speed bus adapter provides an interface between the common high speed bus and low speed line adapters. Communication controlling commands and register structures are described. | |