Method of forming nondefective zone in silicon single crystal wafer by two stage-heat treatment
January 8, 2000. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesElimination of stacking faults in silicon devices: a gettering process Method of making semiconductor device with PN junction in stacking-fault free zone Annealing method to increase minority carrier life-time for neutron transmutation doped semiconductor materials Method of low dose phoshorus implantation for oxide passivated diodes in <10> P-type silicon Method of limiting stacking faults in oxidized silicon wafers Method of increasing the gettering effect in the bulk of semiconductor bodies utilizing a preliminary thermal annealing step Patent #: 4220483 Inventors
ApplicationNo. 06/110456 filed on 01/08/1980US Classes:438/471, GETTERING OF SUBSTRATE257/E21.321, Thermally inducing defects using oxygen present in silicon body for intrinsic gettering (EPO)438/795RADIATION OR ENERGY TREATMENT MODIFYING PROPERTIES OF SEMICONDUCTOR REGION OF SUBSTRATE (E.G., THERMAL, CORPUSCULAR, ELECTROMAGNETIC, ETC.)ExaminersPrimary: Roy, UpendraAttorney, Agent or FirmInternational ClassesH01L 21/02 (20060101)H01L 21/322 (20060101) Foreign Application Priority Data1979-01-19 JPAbstractA silicon single crystal wafer is subjected to two-stage heat treatment. In the first-stage it is heated at a temperature within the range of between 500° C. and 1,000° C. Subsequently the thus heated wafer is heated at a temperature higher than that at the first stage. Thus, a nondefective zone is formed in the surface region of the wafer, and the interior zone of the wafer becomes rich in micro defects capable of gettering impurities such as heavy metals.Other References
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