ApplicationNo. 06/096118 filed on 11/20/1979
US Classes:438/107, Assembly of plural semiconductive substrates each possessing electrical device204/192.17, Electrical contact material216/14, Forming or treating lead frame or beam lead228/1.1, MEANS TO APPLY VIBRATORY SOLID-STATE BONDING ENERGY (E.G., ULTRASONIC, ETC.) TO WORK228/104, Nondestructive testing228/180.21, Component terminal to substrate surface (i.e., nonpenetrating terminal)257/E21.512, Right-up bonding (EPO)257/E23.06, Leads, i.e., metallizations or lead frames on insulating substrates, e.g., chip carriers (EPO)257/E23.189, Leads being parallel to base (EPO)29/827, Beam lead frame or beam lead device427/97.2, Coating hole wall438/125, Insulative housing or support438/611Beam lead formation
ExaminersPrimary: Smith, John D.
Attorney, Agent or Firm
International ClassesG01R 1/073 (20060101)
G01R 31/28 (20060101)
H01L 21/02 (20060101)
H01L 23/057 (20060101)
H01L 21/60 (20060101)
H01L 23/02 (20060101)
H01L 23/498 (20060101)
H01L 23/48 (20060101)
AbstractA semiconductor integrated circuit device of the beam lead type having a semiconductor interconnection substrate with apertures for integrated circuit chips therein and with metallization patterns having sharply pointed ends for penetrating oxide layers over the bonding pads of the chips and for making electrical connection thereto. Devices thus produced may be assembled and tested and failed chips replaced as necessary before the chips are ultrasonically welded to the interconnection metallization and before final fabrication of the device. The invention also includes a method for producing an interconnection substrate in which a plurality of conically shaped holes are etched into a semiconductor wafer having sharp points within the body of the wafer. A metal layer is deposited over the surface of the semiconductor wafer filling the etched holes. Sharp points are thus formed on the metal in the etched holes. Apertures are then etched in the semiconductor wafer and the metal layer etched as required to provide sharply pointed connecting probes suspended above apertures in the semiconductor wafer.