Patent References 2403280 2424998 2547515 2629012 2802047 2984700 Digital data scrambler and descrambler Message verification and transmission error detection by block chaining Patent #: 4074066 InventorsAssigneeApplicationNo. 05/947428 filed on 10/02/1978US Classes:380/29, NBS/DES algorithm380/37Block/data stream encipheringExaminersPrimary: Birmiel, Howard A.Attorney, Agent or FirmInternational ClassH04L 9/06 (20060101)AbstractA complete substitution permutation enciphering and deciphering circuit and method for transforming a plaintext signal into an enciphered signal which is secure during transmission. After receipt, the enciphered signal is transformed back into the original plaintext signal by use of a similar circuit and method. A complete substitution permutation enciphering and deciphering circuit is constructed by interconnecting a number of substitution boxes. Each substitution box is complete, that is each binary bit of the substitution box output is dependent on all binary bits of the substitution box input for all possible combinations of input signals. When such substitution boxes are connected according to the invention, the substitution permutation enciphering and deciphering circuit formed thereby is complete in the sense that every output signal of the circuit is dependent on all input signals of the circuit. | |