Telephone subscriber line unit with sigma-delta digital to analog converter
Patent 4270027 Issued on May 26, 1981. Estimated Expiration Date: 
November 28, 1999. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
November 28, 1999. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3542956 3924077 Feedback residue compression for digital speech systems Interpolation-decimation circuit for increasing or decreasing digital sampling frequency Adaptive linearizing acoustic coupling system Digital-to-analog converter Audio storage and distribution system Subscriber's circuit for four-wire-system local switch Patent #: 4150260 InventorsApplicationNo. 06/098103 filed on 11/28/1979US Classes:379/339, With signal conversion (e.g., dial to DTMF, analog to PCM)375/247, Single bit (delta)379/377, Using line or loop condition detection (e.g., line circuit)379/399.02, Circuitry to provide a coder and decoder function704/212, Pulse code modulation (PCM)704/216, Correlation function704/225Gain controlExaminersPrimary: Atkinson, Charles E.Assistant: Kemeny, E. S. Attorney, Agent or FirmInternational ClassesH04B 14/06 (20060101)H03M 7/32 (20060101) H04B 14/02 (20060101) H04Q 11/04 (20060101) AbstractA digital to analog converter is employed in the digital line circuit of a telephone system and operates to convert a digital signal indicative of an analog speech signal back into a replica of the analog signal. The converter operates with an interpolated input digital signal to detect by means of a sign bit, the characteristic of an input digital word as being indicative of a positive or negative level. An error correcting signal is provided by the converter which is added to the next digital word to provide a compensated word having a sign bit determined by the remainder and the sign bit of the previous digital word. This word is then processed in sequence to produce an output pulse stream from the sign detector indicative of successive positive or negative values as defined by the input digital words, each of which are modified according to the error correcting signal.Other References
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