Digital data processing system with interface adaptor having programmable, monitorable control register therein
Patent 4263650 Issued on April 21, 1981. Estimated Expiration Date: 
January 30, 1999. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
January 30, 1999. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesInventors
AssigneeApplicationNo. 06/007752 filed on 01/30/1979US Classes:710/31Transfer direction selectionExaminersPrimary: Chapnick, Melvin B.Attorney, Agent or FirmInternational ClassesG06F 13/20 (20060101)G06F 13/20 (20060101) G06F 13/38 (20060101) G06F 13/38 (20060101) G06F 13/24 (20060101) G06F 13/24 (20060101) AbstractA digital system including a plurality of metal-oxide-semiconductor (MOS) chip random access memories (RAM), read only memories (ROM) and peripheral interface adaptors coupled to a common bidirectional data bus which is coupled to and controlled by a microprocessor unit (MPU). Each peripheral interface adaptor includes a control register loadable under program control. The contents of the control register control selection of several registers within the interface adaptor. The control register also controls other functions of the peripheral interface adaptor, including determining direction of data movement at the peripheral buffers of the interface adaptor. The contents of the control register of each interface adaptor are monitorable by the microprocessor unit.Other References
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