Patent References 3539705 Integrated circuit fusing technique Patent #: 4032949 InventorAssigneeApplicationNo. 05/900550 filed on 04/27/1978US Classes:438/467, To alter conductivity of fuse or antifuse element257/E23.149, Comprising fuses, i.e., connections having their state changed from conductive to nonconductive (EPO)438/601Using structure alterable to nonconductive state (i.e., fuse)ExaminersPrimary: Tupman, W.Attorney, Agent or FirmInternational ClassesH01L 23/525 (20060101)H01L 23/52 (20060101) AbstractA programmable read only memory array of the fusible link type employs a small part of a deposited metal film as a fuse. The film is covered by a protective glaze which seals the surface of the semiconductor chip to avoid deterioration of the transistors or other components. In order to minimize heat loss to the semiconductor substrate when programming, and to provide a cavity beneath the protective glaze, the metal film is raised above the surface at the position of the fusible link. This is accomplished by a segment of photoresist applied prior to metal deposition, then removed with photoresist stripper after the metal is patterned. | |