Patent References 3799777 Dielectrically isolated semiconductor devices Process for fabricating narrow polycrystalline silicon members Methods for making transistor structures Selective oxidation method Edge etch method for producing narrow openings to the surface of materials Insulated-gate field-effect transistor with self-aligned contact hole to source or drain Methods of manufacturing semiconductor devices Reactive ion etching method for producing deep dielectric isolation in silicon High performance bipolar device and method for making same Patent #: 4160991 InventorsApplicationNo. 05/957605 filed on 11/03/1978US Classes:438/305, Plural doping steps204/192.32, Sputter etching257/465, Geometric configuration of junction (e.g., fingers)257/E21.038, Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (EPO)257/E21.252, By dry-etching (EPO)257/E21.556, Introducing electrical inactive or active impurities in local oxidation region, e.g., to alter LOCOS oxide growth characteristics or for additional isolation purpose (EPO)257/E29.054, Doping structure being parallel to channel length (EPO)438/306, Plural doping steps438/947Subphotolithographic processingExaminersPrimary: Rutledge, L. DewayneAssistant: Saba, W. G. Attorney, Agent or FirmInternational ClassesH01L 21/762 (20060101)H01L 21/70 (20060101) H01L 21/033 (20060101) H01L 29/02 (20060101) H01L 21/311 (20060101) H01L 21/02 (20060101) H01L 29/10 (20060101) AbstractA method for forming a narrow, such as a submicrometer, dimensioned mask opening on a silicon body involving forming a first insulator region having substantially a horizontal surface and a substantially vertical surface. A second insulator is applied on both the horizontal surface and substantially vertical surfaces. The second insulator is composed of a material different from that of the first insulator layer. Reactive ion etching of the second layer removes the horizontal layer and provides a narrow dimensioned second insulator region on the silicon body. The surface of the silicon body is then thermally oxidized. The narrow dimensioned second insulator region is removed to form a narrow dimensioned mask opening.Other References
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