Did You Know...
...that the Band-Aid Bandage was invented by a Johnson & Johnson employee whose wife had cut herself? Earl Dickson's wife was rather accident prone, so he set out to develop a bandage that she could apply without help. He placed a small piece of gauze in the center of a small piece of surgical tape, and what we know today as the Band Aid bandage was born!
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US Patent 4208781 - Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
US Patent Issued on June 24, 1980
Estimated Patent Expiration Date:
June 15, 1998Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
Estimated Patent Expiration Date:
June 15, 1998Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.AbstractResistor elements for MOS integrated circuits are made by an ion implant step compatible with a self-aligned N-channel silicon-gate process. The resistor elements are in a part of a polycrystalline silicon layer which is also used as a gate for an MOS transistor and as an interconnection overlying field oxide. Resistors of this type are ideally suited for load devices in static RAM cells. | InventorsAssigneeApplicationNo. 05/916037 filed on 06/15/1978US Classes:438/238, Including passive device (e.g., resistor, capacitor, etc.)257/E21.004, Of resistor (EPO)257/E21.316, Doping polycrystalline or amorphous silicon layer (EPO)257/E21.582, Characterized by formation and post treatment of conductors, e.g., patterning (EPO)257/E23.142, Including external interconnections consisting of multilayer structure of conductive and insulating layers inseparably formed on semiconductor body (EPO)257/E27.101, Load element being a resistor (EPO)29/610.1, Resistor making438/297, Recessed oxide formed by localized oxidation (i.e., LOCOS)438/385Altering resistivity of conductorExaminersPrimary: Tupman, W.Attorney, Agent or FirmUS Patent References3570114, 4055444Method of making N-channel MOS integrated circuitsIssued on: 10/25/1977 Inventor: Rao International ClassesH01L 21/768 (20060101)H01L 21/70 (20060101) H01L 27/11 (20060101) H01L 23/52 (20060101) H01L 23/522 (20060101) H01L 21/02 (20060101) H01L 21/3215 (20060101) |
