Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer

Patent 4208781 Issued on June 24, 1980. Estimated Expiration Date:

June 15, 1998. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

3570114

Method of making N-channel MOS integrated circuits Patent #: 4055444
Issued on: 10/25/1977
Inventor: Rao

Inventors

Assignee

Texas Instruments Incorporated

Application

No. 05/916037 filed on 06/15/1978

US Classes:

438/238, Including passive device (e.g., resistor, capacitor, etc.)257/E21.004, Of resistor (EPO)257/E21.316, Doping polycrystalline or amorphous silicon layer (EPO)257/E21.582, Characterized by formation and post treatment of conductors, e.g., patterning (EPO)257/E23.142, Including external interconnections consisting of multilayer structure of conductive and insulating layers inseparably formed on semiconductor body (EPO)257/E27.101, Load element being a resistor (EPO)29/610.1, Resistor making438/297, Recessed oxide formed by localized oxidation (i.e., LOCOS)438/385Altering resistivity of conductor

Examiners

Primary: Tupman, W.

Attorney, Agent or Firm

Graham; John G.

International Classes

H01L 21/768 (20060101)
H01L 21/70 (20060101)
H01L 27/11 (20060101)
H01L 23/52 (20060101)
H01L 23/522 (20060101)
H01L 21/02 (20060101)
H01L 21/3215 (20060101)

Abstract

Resistor elements for MOS integrated circuits are made by an ion implant step compatible with a self-aligned N-channel silicon-gate process. The resistor elements are in a part of a polycrystalline silicon layer which is also used as a gate for an MOS transistor and as an interconnection overlying field oxide. Resistors of this type are ideally suited for load devices in static RAM cells.