U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Adapter cluster module for data communications subsystem

Patent 4200930 Issued on April 29, 1980. Estimated Expiration Date: Icon_subject August 10, 1998. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3618037

3668649

Interprocessor communication apparatus for a data processing system
Patent #: 3934232
Issued on: 01/20/1976
Inventor: Curley ,   et al.

Control apparatus for controlling data flow between a control processing unit and peripheral devices
Patent #: 4103328
Issued on: 07/25/1978
Inventor: Dalmasso

Data communications subsystem Patent #: 4156907
Issued on: 05/29/1979
Inventor: Rawlings ,   et al.

Inventors

Assignee

Application

No. 05/932698 filed on 08/10/1978

US Classes:

709/212COMPUTER-TO-COMPUTER DIRECT MEMORY ACCESSING

Examiners

Primary: Springborn, Harvey E.

Attorney, Agent or Firm

International Class

G06F 13/38 (20060101)

Abstract

In a digital data communication network there is provided a data communications subsystem working in conjunction with a main host system having a central host processor and main memory. The data communications subsystem provides a data communications processor and a local autonomous data communications memory connected to a basic control interface unit which supports a plurality of front-end controllers. The data communications subsystem can sense a halt in the main system and operate autonomously and independently of the main host system during such down-time. The present disclosure describes a front-end controller-processor called an adapter cluster module which is used to control a plurality of line adapters, each of which communicates with remote terminals on low to medium speed transmission lines. Up to 16 such adapter cluster modules may be accommodated as front-end controllers within a single data communications subsystem. Each adapter cluster module can handle up to eight transmission lines operating in full duplex mode. A ROM memory area is provided for standard program routines. A RAM memory is provided for storage of special routines and instructions in addition to a scratchpad area for accumulation of a full message block before any interruption is made to the data communications processor requesting further data transfer instructions. Thus, a large magnitude of overhead operations are removed from the data communications processor which formerly was interrupted each time a byte of information was received by the adapter cluster module.

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