MIS field effect transistor having a short channel length

Patent 4190850 Issued on February 26, 1980. Estimated Expiration Date:

January 17, 1998. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

3436620

3604990

3653978

3846822

Field-effect transistor
Patent #: 3950777
Issued on: 04/13/1976
Inventor: Tarui , et al.

Charge pumping device with integrated regulating capacitor and method for making same
Patent #: 4115794
Issued on: 09/19/1978
Inventor: De La Moneda

MOS type semiconductor device Patent #: 4143388
Issued on: 03/06/1979
Inventor: Esaki , et al.

Inventors

Application

No. 05/870216 filed on 01/17/1978

US Classes:

257/343, All contacts on same surface (e.g., lateral structure)257/336, With lightly doped portion of drain region adjacent channel (e.g., LDD structure)257/E21.25, Etching inorganic layer (EPO)257/E21.251, By chemical means (EPO)257/E21.337, Through-implantation (EPO)257/E21.346, Using mask (EPO)257/E21.417, With channel containing layer, e.g., p-base, fo rmed in or on drain region, e.g., DMOS transistor (EPO)257/E29.04, Of field-effect transistors with insulated gate (EPO)257/E29.066, Body region structure of IGFET's with channel containing layer (DMOSFET or IGBT) (EPO)257/E29.121, Source or drain electrode in groove (EPO)257/E29.133, Nonuniform insulating layer thickness (EPO)257/E29.256, With channel containing layer contacting drain drift region (e.g., DMOS transistor) (EPO)257/E29.257, Having vertical bulk current component or current vertically following trench gate (e.g., vertical power DMOS transistor) (EPO)257/E29.261, With at least part of active region on insulating substrate (e.g., lateral DMOS in oxide isolated well) (EPO)257/E29.279, Asymmetrical source and drain regions (EPO)257/E29.287SOS transistor (EPO)

Examiners

Primary: Clawson, Joseph E. Jr.

Attorney, Agent or Firm

Hill, Van Santen, Steadman, Chiara & Simpson

International Classes

H01L 21/266 (20060101)
H01L 29/78 (20060101)
H01L 21/02 (20060101)
H01L 29/66 (20060101)
H01L 29/423 (20060101)
H01L 29/02 (20060101)
H01L 21/336 (20060101)
H01L 21/265 (20060101)
H01L 29/786 (20060101)
H01L 21/311 (20060101)
H01L 29/10 (20060101)
H01L 29/40 (20060101)
H01L 29/08 (20060101)

Foreign Application Priority Data

1977-01-31 DE

Abstract

A MIS field effect transistor having a source zone of a first impurity type formed in a semiconductor substrate immediately below one planar surface thereof, a drain zone of the first conductivity type in said substrate spaced from the source zone immediately below said one surface, a third zone, of said first impurity type in said substrate extending between said source and drain zones and extending deeper in said substrate than either said source or drain zones, a thin buried zone of the second conductivity type in said substrate spaced below and around the ends of said source zone, the region of said buried zone where it lies between said source and drain zones providing a channel whose length is only the thickness of the buried zone in the region where the buried zone reaches the substrate surface. A process for producing such a transistor is also disclosed.