Patent References 3447135 3500336 3828325 3833930 InventorAssigneeApplicationNo. 05/892979 filed on 04/03/1978US Classes:710/113Centralized bus arbitrationExaminersPrimary: Springborn, Harvey E.Attorney, Agent or FirmInternational ClassesG06F 13/36 (20060101)G06F 13/16 (20060101) G06F 13/38 (20060101) G06F 13/364 (20060101) G06F 13/18 (20060101) G06F 3/153 (20060101) AbstractA visual output assembly connects to a bus in a data processing system. The assembly includes a memory, plural visual display units and a multiplexing unit that connects to the bus, the memory and each visual display unit. Priority arbitration circuitry in the multiplexing unit receives request signals for access to the memory from the bus and from each of the visual display units. The priority arbitration circuitry controls address and data path switching circuits to establish appropriate address and data paths between the memory and the selected one of the bus and visual display units. | |