Patent References 3685020 3737871 3921141 Memory and buffer arrangement for digital computers Patent #: 3938097 InventorsApplicationNo. 642034 filed on 12/18/1975US Classes:711/117, Hierarchical memories711/112, Direct access storage device (DASD)711/143Write-backExaminersPrimary: Springborn, Harvey E.Attorney, Agent or FirmInternational ClassG06F 013/08AbstractThis is a multi level or hierarchial memory system for a multi processing system in which two or more processing units access the memory system. This memory system has two types of memory units on each level with the exception of the lowest level. One of the types of units is called the data store and is for storing all the data at any given level of the memory. The other type of unit is called the copy back store and is for storing all the changes that have been made in data at that level either by addition or modification. The next to lowest level of the hierarchy the data store and copy back stores are embodied in magnetic disc units and the lowest level of the hierarchy the data stores are embodied in a tape unit with multiple input stations. The disc and tape units are all serially strung together on two independent accessing loops which access the tape unit through a different one of the input stations of the tape unit. In the next to lowest level of the hierarchy, the changes made in data stored on any one of the mentioned disc units are stored on a different one of the mentioned disc units. In the lowest level of the hierarchy, the data base for the memory hierarchy system, is stored in duplicate in the mentioned tape unit. Both duplicate copies of the data base are continually updated for changes made in the data base. The two independent accessing loops are on two different power systems so that changes in data to be transferred into the two lowest levels can continue to be made on one loop while there is a power failure on the other loop.Field of SearchPROCESS | |