Method of manufacturing semiconductor device
Oxide isolated integrated injection logic with selective guard ring
Method of manufacturing a semiconductor device having an insulation layer sunk in a semiconductor body and semiconductor device manufactured according to said method Patent #: 3996077
ApplicationNo. 05/705382 filed on 07/15/1976
US Classes:438/350, Forming base region of specified dopant concentration profile (e.g., inactive base region more heavily doped than active base region, etc.)257/592, With base region having specified doping concentration profile or specified configuration (e.g., inactive base more heavily doped than active base or base region has constant doping concentration portion (e.g., epitaxial base))257/E21.033, Comprising inorganic layer (EPO)257/E21.219, Chemical etching (EPO)257/E21.553, In region recessed from surface, e.g., in recess, groove, tub or trench region (EPO)257/E21.557, Introducing electrical active impurities in local oxidation region solely for forming channel stoppers (EPO)257/E21.61, Comprising merged transistor logic or integrated injection logic (EPO)257/E29.045, Of lateral transistors (EPO)257/E29.187, Lateral transistor (EPO)438/336, Combined with vertical bipolar transistor438/363, With epitaxial semiconductor layer formation438/365, Forming active region from adjacent doped polycrystalline or amorphous semiconductor438/919Compensation doping
ExaminersPrimary: Ozaki, G.
Attorney, Agent or Firm
AbstractA method of fabricating bipolar transistors with increased gain. A base region is formed adjacent the collector (or emitter) region of the transistor, and a portion of the base region is then removed by etching. The emitter (or collector) is then formed by diffusing dopant into the base region where the portion has been removed, with the base region separating the emitter and collector having reduced thickness due to the etching. Advantageously, the base region may be formed with a more heavily-doped region overlying a less heavily-doped region, with a part of the more heavily-doped region removed by etching, thereby providing a highly conductive path to the lower conductivity base region separating the emitter and collector regions. The process steps are compatible with conventional integrated-circuit fabrication processes.