Method and structure for controllng carrier lifetime in semiconductor devices
Patent 4053925 Issued on October 11, 1977. Estimated Expiration Date: 
October 11, 1994. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
October 11, 1994. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3502515 3645808 3796929 3888701 InventorsAssigneeApplicationNo. 05/602710 filed on 08/07/1975US Classes:257/376, With barrier region of reduced minority carrier lifetime (e.g., heavily doped P+ region to reduce electron minority carrier lifetime, or containing deep level impurity or crystal damage), or with region of high threshold voltage (e.g., heavily doped channel stop region)257/590, With means to reduce minority carrier lifetime (e.g., region of deep level dopant or region of crystal damage)257/611, With specified distribution (e.g., laterally localized, with specified concentration distribution or gradient)257/612, Deep level dopant other than gold or platinum257/617, INCLUDING REGION CONTAINING CRYSTAL DAMAGE257/E21.335, In Group IV semiconductor (EPO)257/E21.54, Making of isolation regions between components (EPO)257/E27.063, Means for preventing a parasitic bipolar action between the different transistor regions, e.g. latch-up prevention (EPO)257/E29.034, Collector regions of bipolar transistors (EPO)257/E29.086, Further characterized by doping material (EPO)438/199, Complementary insulated gate field effect transistors (i.e., CMOS)438/217, Doping of semiconductor channel region beneath gate insulator (e.g., threshold voltage adjustment, etc.)438/309, FORMING BIPOLAR TRANSISTOR BY FORMATION OR ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS438/904CHARGE CARRIER LIFETIME CONTROLExaminersPrimary: Larkins, William D.Attorney, Agent or FirmAbstractThe device structure is a bi-polar transistor having a region of inert atoms located in the collector adjacent to the base-collector junction. Another embodiment of the invention is a complementary insulated gate field effect transistor (IGFET) structure having N and P channel IGFETs with regions of implanted ions beneath the source and drain of one or both transistors, and/or annular regions projecting inwardly from the surface that surround or separate the different types of IGFETs.Other References
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