ApplicationNo. 05/616283 filed on 09/24/1975
US Classes:708/290, Interpolation/extrapolation341/61, Data rate conversion708/313Decimation/interpolation
ExaminersPrimary: Malzahn, David H.
Attorney, Agent or Firm
AbstractA general purpose interpolator-decimator circuit for increasing or decreasing the sampling rate of a digital signal by a factor L/M, where L and M are integers, is disclosed. The circuit includes means for determining each output sample by multiplying a sequence of previous input samples by a set of coefficients and accumulating the resulting products. L sets of coefficients, in which each coefficient is a function of the factors L and M, are stored in a specific sequence which permits sequential addressing of both the coefficients and input signal samples. A multistage decimator cascaded with a multistage interpolator to effect a narrow-band FIR filter is also disclosed.