U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Semiconductor devices having surface state control

Patent 3983574 Issued on September 28, 1976. Estimated Expiration Date: Icon_subject September 28, 1993. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3403284

3458782

3507709

3717790

3810796

3852120

3886530

Inventors

Assignee

Application

No. 05/553717 filed on 02/27/1975

US Classes:

257/461, Light responsive pn junction257/917, PLURAL DOPANTS OF SAME CONDUCTIVITY TYPE IN SAME REGION257/E21.248, By ion implantation (EPO)257/E29.016, For preventing surface leakage due to surface inversion layer (e.g., channel stop) (EPO)257/E29.255, With field effect produced by insulated gate (EPO)257/E31.119, Coatings (EPO)257/E31.12, For device having potential or surface barrier (EPO)313/367Mosaic

Examiners

Primary: Edlow, Martin H.

Attorney, Agent or Firm

International Classes

H01J 29/45 (20060101)
H01L 29/78 (20060101)
H01J 29/10 (20060101)
H01L 29/06 (20060101)
H01L 29/00 (20060101)
H01L 29/02 (20060101)
H01L 21/02 (20060101)
H01L 21/3115 (20060101)
H01L 21/00 (20060101)
H01L 31/00 (20060101)
H01L 31/0216 (20060101)
H01L 29/66 (20060101)
H01L 27/00 (20060101)

Abstract

A semiconductor structure having a surface insulating layer formed as a grid with charges implanted in the insulating material to prevent inversion and, hence, channeling between adjacent semiconductor regions, preferably for use in a non-blooming vidicon. The method of manufacturing such a structure uses ion implantation to create immobile positive charges in a grid pattern in an insulating layer in regions spaced from the interface between the insulating layer and the semiconductor body. The insulating layer is of sufficient thickness that substantially all of the charge sites in the insulating layer are separated from the outer surface of the insulator by a sufficient distance to effectively prevent a negative electric field from reaching into the silicon.

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