Patent References 2820841 3229104 3641512 3789369 3832732 InventorsAssigneeApplicationNo. 487963 filed on 07/12/1974US Classes:365/185.04, Data security257/432, With optical element257/E27.133, Photodiode array or MOS imager (EPO)257/E29.309, With charge trapping gate insulator (e.g., MNOS-memory transistors) (EPO)365/185.27Substrate biasExaminersPrimary: Hecker, Stuart N.Attorney, Agent or FirmForeign Application Priority Data1973-07-13 JAAbstractA semiconductor non-volatile optical memory device is constructed by providing light-permeable charge retention means in an insulating layer on a first semiconductor surface into which photo-generated carriers in the surface of the first semiconductor region are injected over the semiconductor-insulator potential barrier by applying reverse bias between the first semiconductor region and a second region forming a rectifying junction with the first semiconductor region. Also disclosed in a non-volatile memory integrated circuit employing one or more of said devices together with light source in the same package. The non-volatile memory integrated circuit operates under low bias voltage and is compatible with a high speed integrated logic circuits.Other References
| |