Method of manufacturing semiconductor devices
Patent 3947299 Issued on March 30, 1976. Estimated Expiration Date: 
March 30, 1993. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
March 30, 1993. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3386865 3631309 3648125 3649386 3796613 InventorsApplicationNo. 539782 filed on 01/09/1975US Classes:438/442, With epitaxial semiconductor layer formation257/511, With complementary (npn and pnp) bipolar transistor structures257/515, With active junction abutting groove (e.g., "walled emitter")257/516, With passive component (e.g., resistor, capacitor, etc.)257/518, With polycrystalline connecting region (e.g., polysilicon base contact)257/648, Combined with channel stop region in semiconductor257/E21.258, Using masks (EPO)257/E21.538, Making of internal connections, substrate contacts (EPO)257/E21.548, Concurrent filling of plurality of trenches having different trench shape or dimension, e.g., rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches (EPO)257/E21.549, Of trenches having shape other than rectangular or V shape, e.g., rounded corners, oblique or rounded trench walls (EPO)257/E21.551, Introducing impurities in trench side or bottom walls, e.g., for forming channel stoppers or alter isolation behavior (EPO)257/E21.552, Using local oxidation of silicon, e.g., LOCOS, SWAMI, SILO (EPO)257/E21.553, In region recessed from surface, e.g., in recess, groove, tub or trench region (EPO)257/E21.572, Polycrystalline semiconductor regions (EPO)257/E21.608, Bipolar technology (EPO)257/E27.017, In combination with bipolar transistor and diode, resistor, or capacitor (EPO)438/969SIMULTANEOUS FORMATION OF MONOCRYSTALLINE AND POLYCRYSTALLINE REGIONSExaminersPrimary: Rutledge, L. DewayneAssistant: Davis, J. Attorney, Agent or FirmForeign Application Priority Data1971-05-22 NLAbstractA method of making a semiconductor device for application in a monolithic integrated circuit is described wherein a local buried insulating layer is provided at the interface of a substrate and a semiconductive layer, and then the semiconductive layer is locally converted into a insulator which extends down to the buried insulator. The method is useful, among other things, for providing isolated semiconductor islands. | |
