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| Number | Title | Issue Date |
| 6438723 | Method and arrangement for the reliable transmission of packet data A method is provided for reliably receiving digital information from a transmitting device. The information to be received is arranged in discrete subunits (201, 202, 203, 204, 301, 302, 303, 304) so that a predetermined number of subunits correspond to a... | 08/20/2002 |
| 6438724 | Method and apparatus for deterministically altering cyclic redundancy check information for data storage A method and apparatus for ensuring the integrity of data that can detect errors that remain when the data correction scheme fails to correct at least some of the errors, or has added additional errors. Reed-Solomon check symbols are used for error correc... | 08/20/2002 |
| 6438725 | Apparatus and method for fast code coverage analysis Apparatus and method are described for fast code coverage analysis. The present invention for fast code coverage analysis utilizes a technique that provides for capturing an event every first time that a block of code is visited. This allows for generatin... | 08/20/2002 |
| 6438726 | Method of dual use of non-volatile memory for error correction A method of dual use of memory for the correction of errors, if any, in memory data comprises the steps of assigning data bytes to a first portion of each memory page and error correction bytes to a second portion of each memory page. In a non-error corre... | 08/20/2002 |
| 6438727 | Threefold error correction coding method and apparatus for high definition digital video cassette recorder A recording/reproducing apparatus is provded for dispersedly recording one-frame data on a plurality of tracks. The recording/reproducing apparatus includes a trans-codec for format converting received digital data into sync blocks each of which has a pre... | 08/20/2002 |
| 6438728 | Error character generation In an error generating circuit and method for generating a 10-bit error character to test 8B/10B decoders, a character generator receives a two-state mode control signal and a two-state disparity control signal and generates a 10-bit error character of a ... | 08/20/2002 |
| 6438729 | Connectivity-based approach for extracting layout parasitics A layout parasitics extraction system uses a connectivity-based approach to permit net-by-net extraction of layout parasitics. The system creates a connectivity-based database (1104), where geometries of a layout are organized by nets of the circuit schem... | 08/20/2002 |
| 6438730 | RTL code optimization for resource sharing structures A system and method of optimizing a circuit design. The design may be coded in register transfer language (RTL) code. First the design code representing an integrated circuit design to be optimized is retrieved and sequentially searched for decision const... | 08/20/2002 |
| 6438731 | Integrated circuit models having associated timing exception information therewith for use in circuit design optimizations Integrated circuit models having associated timing and tag information therewith for use with design optimizations to effectively model timing exception information. The present invention includes a circuit block model which allows automated circuit optim... | 08/20/2002 |
| 6438732 | Method and apparatus for modeling gate capacitance of symmetrically and asymmetrically sized differential cascode voltage swing logic (DCVSL) A method and apparatus for determining load capacitance of DCVSL circuits in timing verification of a circuit is disclosed in the present invention. The gate capacitances for various MOS devices are modeled based upon simulations with certain conditions f... | 08/20/2002 |
| 6438733 | IC substrate noise modeling with improved surface gridding technique Methods and apparatus for performing surface modeling of a substrate for the purpose of characterizing the substrate, which includes initially dividing said substrate surface into a plurality of local partitions and thereafter forming divisions from said ... | 08/20/2002 |
| 6438734 | Fast search method for enabling a computer to find elementary loops in a graph A method for operating a computer to find elementary loops in a strongly connected component of a graph. In the basic method, the computer identifies a starting vertex from the vertices of the strongly connected component that have not been examined as a ... | 08/20/2002 |
| 6438735 | Methods and apparatuses for designing integrated circuits Methods and apparatuses for designing a plurality of integrated circuits (ICs) from a language representation of hardware. In one example of a method, a technology independent RTL (register transfer level) netlist is partitioned between representations of... | 08/20/2002 |
| 6438736 | Method for determining cleanup line routing for components of an integrated circuit A method for forming a structural similarity group from a netlist for use in performing a relative placement of components of an integrated circuit is described. Also described are a method for forming a relative placement of components of an integrated c... | 08/20/2002 |
| 6438737 | Reconfigurable logic for a computer A system is disclosed including a reconfigurable logic circuit having programmable logic, a first memory, and a second memory. The first memory stores a number of logic designs each operable to configure the programmable logic. Also included is a computer... | 08/20/2002 |
| 6438738 | System and method for configuring a programmable logic device System and method for configuring a programmable logic device (PLD) using an automatically generated configuration control file. A control file contains directives for configuring a PLD with a configuration bitstream, wherein the directives are in a selec... | 08/20/2002 |
| 6438739 | High-level synthesis device high level synthesis method and recording medium with high level synthesis program A high-level synthesis device includes: a process extraction section for extracting an available process which performs data communications through a path having no loop from all processes described in an inputted behavioral description; a circuit synthes... | 08/20/2002 |
| 6438740 | System and method for dynamically identifying free registers A system and method for identifying free registers within a program. A depth first search of a flow diagram representing the execution of a program is performed. The search proceeds simultaneously for all the registers and identifies the free registers fr... | 08/20/2002 |
| 6438741 | System and method for eliminating compile time explosion in a top down rule based system using selective sampling The present invention reduces the compile time in a top-down rule based system by identifying the complexity of a query prior to applying a rule to an expression. If the complexity of the query is above a threshold, the present invention determines whethe... | 08/20/2002 |
| 6438742 | Object-oriented system and method for visually generating software applications An object-oriented system and method for visually generating software applications. The object-oriented system for visually generating software applications includes a visual interface for defining and linking control objects and corresponding services to... | 08/20/2002 |
| 6438743 | Method and apparatus for object cache registration and maintenance in a networked software development environment The present invention is a method and apparatus for building a software system in a networked software development environment, utilizing existing software version control and build tools such as RCS and MAKE. Source and object files are loaded into netwo... | 08/20/2002 |
| 6438744 | Dynamic mapping of component interfaces The dynamic mapping from an ActiveX component model to a JavaBean model is disclosed. In one embodiment, an ActiveX compatible object is created at run-time for those JavaBean components that an ActiveX client application wishes to utilize. In another emb... | 08/20/2002 |
| 6438745 | Program conversion apparatus A program conversion apparatus includes: a library call instruction detecting unit for detecting each library call instruction included in an inputted object program, the library call instruction calling a source library that is an external program module... | 08/20/2002 |
| 6438746 | DCE functional dimensioning A compiler is provided for a distributed object system in which functional requirements on system performance criteria can be entered as comment fields in an object-oriented language (e.g., C++) which are ignored by a conventional compiler (to allow compi... | 08/20/2002 |
| 6438747 | Programmatic iteration scheduling for parallel processors A parallel compiler maps iterations of a nested loop to processor elements in a parallel array and schedules a start time for each iteration such that the processor elements are fully utilized without being overloaded. The compiler employs an efficient an... | 08/20/2002 |
| 6438748 | Apparatus and method for conversion of messages To achieve a highly efficient upgrade of software in computer based systems a message conversion apparatus (34) comprises an interface unit (36) for message conversion information (MCI) describing at least one message being exchanged in a software process... | 08/20/2002 |
| 6438749 | Method and system for restoring a computer to its original state after an unsuccessful patch installation attempt A system, method and computer-readable medium for creating patch rollback scripts for operations performed by an installer program module. A patch rollback script may be used to reverse an action of an installer program module so that a user's machine is ... | 08/20/2002 |
| 6438750 | Determining loading time of an operating system The present invention is a method and apparatus to determine loading time of an operating system in a computer system. A basic input and output system (BIOS) retrieves a first time value from a real-time clock. The BIOS loads the OS into memory of the com... | 08/20/2002 |
| 6438751 | Integrated television and internet information system A method and apparatus that enables a user to store event information while watching a television broadcast is disclosed. The event information is transmitted to a server, preferably via the Internet. Based on the event information, the server determines ... | 08/20/2002 |
| 6438752 | Method and system for selecting television programs based on the past selection history of an identified user A system and method for selecting programs based on the past selection history of an identified user that allows the identified user to "surf" directly between desired programs. The system includes a head-end server operable to receive program signals fro... | 08/20/2002 |
| 6438753 | Arrangement for TV broadcasting outdoor events or the like An arrangement for TV broadcasting outdoor events or the like via a mobile unit (34), which is connected via cables (30, 11, 20) to devices (12, 21, 22) for supplying and/or receiving video, audio or control signals and accommodates corresponding apparatu... | 08/20/2002 |
