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| Number | Title | Issue Date |
| 8143696 | Integrated circuit inductors with reduced magnetic coupling An IC inductor structure is provided which includes a first inductor element formed on a semiconductor substrate and at least a second inductor element formed on the semiconductor substrate proximate the first inductor element. The first inductor element has a first... | 03/27/2012 |
| 7844021 | Method and apparatus for clock skew calibration in a clock and data recovery system using multiphase sampling Methods and apparatus are provided for clock skew calibration in a clock and data recovery system. One aspect of the invention compensates for skew among a plurality of clocks in a clock and data recovery system. The clocks are applied to a plurality of latches to s... | 11/30/2010 |
| 7839965 | High-speed serial data link with single precision clock source A clock generator is provided for a transmitter in a transceiver adapted to communicate data over a serial data link. The transceiver includes a clock data recovery circuit recovers a receive clock signal and outputs a reference clock signal. The clock generator inc... | 11/23/2010 |
| 7787515 | Method and apparatus for generation of asynchronous clock for spread spectrum transmission A circuit for spread spectrum rate control uses a first interpolator to phase interpolate between a first signal and a second signal and generate a first output signal based on a first control signal. A second interpolator is utilized to phase interpolate between a ... | 08/31/2010 |
| 7710170 | Internal supply voltage controlled PLL and methods for using such Various embodiments of the present invention provide systems and circuits for clock signal generation. For example, various embodiments of the present invention provide semiconductor devices that include a power source and a phase lock loop circuit. The power source... | 05/04/2010 |
| 7680217 | Methods and systems for coding of a bang-bang detector Various apparatus and methods for related to clock recovery are disclosed. For example, in one illustrative embodiment, a clock recovery circuit includes a coding circuit adapted to translate a stream of first digital numbers derived from a source signal into a stre... | 03/16/2010 |
| 7679405 | Latch-based sense amplifier Various embodiments of the present invention provide systems and circuits for processing information through comparison of input signals. For example, various embodiments of the present invention provide differential latch circuits. Such differential latch circuits ... | 03/16/2010 |
| 7268631 | Phase locked loop with scaled damping capacitor In order to reduce the area of a charge pump PLL, one may separate proportional component and integral component of the loop filter voltage, and add additional circuitry so as to make the integral component appear as though it is affected by a much larger value of c... | 09/11/2007 |
| 7106107 | Reliability comparator with hysteresis A comparator circuit includes a reference generator connecting to a first source providing a first voltage. The reference generator is operative to generate a reference signal and includes a control circuit selectively operable in at least a first mode or a second m... | 09/12/2006 |
| 7049866 | Compensating for leakage currents in loop filter capacitors in PLLs and the like Circuitry compensates for adverse effects resulting from leakage currents in loop filter capacitors for signal synthesizers, like PLLs. In one technique, leakage current in the loop filter's damping capacitor is compensated by driving the voltage across a matching c... | 05/23/2006 |
| 6876054 | Integrable DC/AC voltage transformer/isolator and ultra-large-scale circuit incorporating the same An electronic device, a method of manufacturing an electronic device and an integrated circuit that employs at least one such electronic device to couple first and second circuits together in an isolated fashion. In one embodiment, the electronic device includes a f... | 04/05/2005 |
| 6594330 | Phase-locked loop with digitally controlled, frequency-multiplying oscillator A phase-locked loop (PLL) having a digitally controlled oscillator (DCO), where the DCO receives a digital control signal generated by the PLL and an externally generated oscillator clock signal and generates an output signal having a frequency greater th... | 07/15/2003 |
| 6114920 | Self-calibrating voltage-controlled oscillator for asynchronous phase applications A circuit, such as a phase-lock loop (PLL), has an oscillator having a plurality of operating curves. During circuit auto-trim operations, the oscillator is automatically trimmed to an appropriate oscillator operating curve for use during normal circuit o... | 09/05/2000 |
| 6043715 | Phase-locked loop with static phase offset compensation A phase-locked loop (PLL) has a master circuit configured to a slave circuit. The slave circuit has a phase detector, a charge pump, a loop filter, and a voltage-controlled oscillator configured to operate as a closed-loop PLL. The master circuit has a ph... | 03/28/2000 |
| 6040742 | Charge-pump phase-locked loop with DC current source A phase-locked loop (PLL) has a phase detector (PD), a charge pump, a loop filter, and a voltage-controlled oscillator (VCO). The PD generates DOWN pulses based on differences in phase between an input signal and a feedback signal. The charge pump has an ... | 03/21/2000 |
| 5942949 | Self-calibrating phase-lock loop with auto-trim operations for selecting an appropriate oscillator operating curve A phase-lock loop (PLL) has an oscillator having a plurality of operating curves. During PLL auto-trim operations, the oscillator is automatically trimmed to an appropriate oscillator operating curve for use during normal PLL operations. In particular emb... | 08/24/1999 |
