|Application No.||Application Title||Issue Date|
|20060215468||Semiconductor memory device|
In a semiconductor memory device for reading out multilevel data in a time-shared manner at different timings, by providing plural control signal lines for controlling the operation timings of the output buffer circuits, the operation timings of output buffer circuits c...
|20050174859||Bias voltage applying circuit and semiconductor memory device|
Two bias circuits which supply a current to a selected memory cell and a reference memory cell have the same circuit constitution. Each bias circuit includes a first active element between a power supply node and a junction node, where a current is controlled to prevent...
|20050174868||Nonvolatile semiconductor memory device|
A nonvolatile semiconductor memory device comprises a readout circuit which reads data stored in a selected memory cell by applying predetermined voltage to the selected memory cell and a reference cell such that currents corresponding to the respective threshold voltag...