Inventor: Hiroshi Takenaka

Address: Kyoto, JP
No. of patents: 4
Last patent issue date: 07/05/2005

Number	Title	Issue Date
6913989	Method of exposing a semiconductor integrated circuit including device regions and global routing region In a semiconductor integrated circuit device including a plurality of semiconductor devices formed on a substrate, the principal plane of the substrate is partitioned into a plurality of device regions and into a plurality of routing regions each crossing a boundary...	07/05/2005
6725440	Semiconductor integrated circuit device comprising a plurality of semiconductor devices formed on a substrate In a semiconductor integrated circuit device including a plurality of semiconductor devices formed on a substrate, the principal plane of the substrate is partitioned into a plurality of device regions and into a plurality of routing regions each crossing a boundary...	04/20/2004
6281513	Pattern forming method Forward-scatter energy E.sub.f, deposited at the center of an electron beam focused on a resist film out of energy of a forward-scattered electron, is derived. A first exposure dose D.sub.f is also obtained as a minimum exposure dose at which one of lines...	08/28/2001
4990530	Indomethacin injections and their production method Injections containing anhydrous sodium indomethacin and methods for producing injections containing an hydrous sodium indomethacin which comprise converting a solution of indomethacin to a solution of sodium indomethacin by adding dropwise an aqueous solu...	02/05/1991

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