|Application No.||Application Title||Issue Date|
|20110061058||TASK SCHEDULING METHOD AND MULTI-CORE SYSTEM|
A task scheduling method and multi-core system according to an embodiment of the present invention comprises: in scheduling for selecting a task that is set in an execution state with a microprocessor allocated thereto out of tasks in an executable state, it is determin...
|20090254710||DEVICE AND METHOD FOR CONTROLLING CACHE MEMORY|
A cache memory control device according to an embodiment of the present invention comprises: a refill counter that counts a refill request, and a cache-capacity determining unit that determines cache capacity. The cache-capacity determining unit transmits a cache-capaci...
|20090193220||MEMORY MANAGEMENT DEVICE APPLIED TO SHARED-MEMORY MULTIPROCESSOR|
A plurality of processors are capable of parallel operation. A memory is shared by the plurality of processors. The memory has an allocated memory size indicating the size of an area allocated to an allocatable area in the memory at the request of one of the plurality o...