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| Number | Title | Issue Date |
| 6134282 | Method for lowpass filter calibration in a satellite receiver An improved satellite receiver front end architecture having a tuner chip and a demodulator/decoder chip. The tuner chip includes a lowpass filter having a configurable cutoff frequency, and the tuner chip uses a frequency signal to provide accurate adjus... | 10/17/2000 |
| 6091931 | Frequency synthesis architecture in a satellite receiver An improved DBS receiver front end architecture having a tuner chip and a demodulator/decoder chip. The tuner chip and the demodulator/decoder chip each include portions of a digital tuning frequency synthesizer. The frequency synthesizer comprises one or... | 07/18/2000 |
| 5999793 | Satellite receiver tuner chip with frequency synthesizer having an externally configurable charge pump The problems outlined above are in large part solved by an improved DBS receiver front end architecture having a tuner chip and a demodulator/decoder chip. The front end includes a frequency synthesizer with an externally configurable charge pump on the t... | 12/07/1999 |
| 5995563 | System and method for fast channel switching in a satellite receiver A DBS receiver front end which converts the received signal directly to the baseband representation and maintains a high performance with a new techniques for tracking and counteracting frequency drift and I/Q angular error. The DBS receiver front end com... | 11/30/1999 |
| 5955783 | High frequency signal processing chip having signal pins distributed to minimize signal interference A DBS receiver front end which includes a tuner chip and a demodulator/decoder chip. The tuner chip converts a receive signal to a baseband signal using a tuning frequency signal generated from a tank circuit. The design of a package for the tuner chip ma... | 09/21/1999 |
| 5901184 | Extended range voltage controlled oscillator for frequency synthesis in a satellite receiver An improved DBS receiver front end architecture having a voltage controlled oscillator for frequency synthesis. The voltage controlled oscillator includes a tank circuit having an adjustable resonance frequency which may be varied over an octave. A tuning... | 05/04/1999 |
| 5870439 | Satellite receiver tuner chip having reduced digital noise interference A DBS receiver front end which includes a tuner chip and a demodulator/decoder chip having digital interface signals. The tuner chip is configured to receive the digital signals at a reduced peak-to-peak amplitude to reduce the digital interference noise ... | 02/09/1999 |
| 5844948 | System and method for digital tracking and compensation of frequency offset error in a satellite receiver A DBS receiver front end which converts the received signal directly to the baseband representation and maintains a high performance with a new techniques for tracking and counteracting frequency drift and I/Q angular error. The DBS receiver front end com... | 12/01/1998 |
| 5819157 | Reduced power tuner chip with integrated voltage regulator for a satellite receiver system An improved DBS receiver front end architecture having a tuner chip and a demodulator/decoder chip. The tuner chip has reduced-power features which allow the incorporation of an on-chip voltage regulator. The tuner chip is a direct conversion tuner with o... | 10/06/1998 |
| 5812927 | System and method for correction of I/Q angular error in a satellite receiver A DBS receiver front end which converts the received signal directly to the baseband representation and maintains a high performance with a new techniques for tracking and counteracting frequency drift, and correcting I/Q angular error and amplitude imbal... | 09/22/1998 |
