Inventor: Ki-Jun Lee

Address: Nepean, CA
No. of patents: 4
Last patent issue date: 11/22/2011

Number	Title	Issue Date
8063687	Dual control analog delay element An analog delay element for delaying an input clock signal to produce an output clock signal. The analog delay element includes a delay circuit for receiving the input clock signal and for providing an intermediate clock signal in response to a first bias voltage. A...	11/22/2011
7263117	Dual control analog delay element and related delay method A delay line including analog delay elements each having a selectively adjusted coarse and fine delay portion is described. The coarse delay portion receives an input clock signal and generates a ramp signal having a slope based on a predetermined coarse delay setti...	08/28/2007
6559699	Dual control analog delay element A delay line comprised of analog delay elements each having a selectively adjusted coarse and fine delay portion is described. The coarse delay portion receives an input clock signal and generates a ramp signal having a slope based on a predetermined coar...	05/06/2003
6057676	Regulated DRAM cell plate and precharge voltage generator A regulator circuit is provided for use with cell plate voltage generators of memory cell capacitors and precharge bit lines voltage generators in semiconductor memories. The circuit employs a current source coupled to the charging reference voltage whose...	05/02/2000

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